Fast Creation of Analog Reusable IP Libraries
Transfer of High sofisticated IP modules into new Processes
Development of own Memory, converter, standard cell or IO-library as GEM IP
PDK Development with IPGEN® Methodology
Process characterization with a generator concept
Specicial Design service
Analog IP development (reference based)
Standard IPs or Parametrizable and/or configurable IPs
Analog IP transfer (Cadence or Mentor Design Environment)
Transfer of existing IP blocks between any technology, foundry process and applications
Analog IP shipment to allow process profile extraction
Process monitoring, yield and reliability control, advanced simulation models
Experience in technologies from 0,6µm down to 40nm
We offer Standard and Advanced Trainig to create GEM IP or to built up a new Technology Setup file (TsF).
All cells, IO's, modules and macros of the below shoon chip were created with GEM IP
